Digital signal processing has been proven to be very efficient in handling and manipulating large quantities of data. There are many products that are in common use such as wireless devices, digital cameras, motor controllers, automobiles, and toys, to name a few, that rely on digital signal processing to operate. Many of these products continuously receive information that is monitored and used to produce adjustments to the system thereby maintaining optimum performance. The data is often an analog signal that must be converted to a representative digital signal. For example, light intensity, temperature, revolutions per minute, air pressure, and power are but a few parameters that are often measured. Typically, an analog to digital (A/D) converter is the component used to convert an analog signal to a digital signal. In general, the conversion process comprises periodically sampling the analog signal and converting each sampled signal to a corresponding digital signal.
Many applications require the analog to digital converter(s) to sample at high data rates, operate at low power, and provide high resolution. These requirements are often contradictory to one another. Furthermore, cost is an important factor that directly correlates to the amount of semiconductor area needed to implement a design. One type of analog to digital converter that has been used extensively is a redundant signed digit (RSD) analog to digital converter. The RSD analog to digital converter typically comprises one or more RSD stages and a sample/hold circuit. In one embodiment, a sampled voltage is compared against a high reference voltage and a low reference voltage. The result of the comparison corresponds to an extracted bit (1 or 0) from the RSD stage. A residue voltage is then generated that relates to the sampled voltage less the voltage value of the extracted bit. The residue voltage is then provided to another RSD stage or fedback in a loop to continue the conversion process to extract bits until the least significant bit is generated. Typically, a RSD analog to digital converter uses an analog arithmetic unit known as a multiplying digital to analog converter or MDAC. The MDAC includes a high performance operational amplifier. Characteristics such as gain, bandwidth, and slew rate of the amplifier affect the settling time which determines the sampling speed of the analog to digital converter. The design of a high performance amplifier can take up a substantial amount of the space of a RSD analog to digital converter. The total power dissipated by the RSD analog to digital converter is closely linked to the amplifiers used in the circuit.
Accordingly, it is desirable to provide an analog to digital converter that operates at high clock rates. In addition, it is desirable to reduce the size of the analog to digital converter to lower the cost to manufacture. It would be also be beneficial to reduce power consumption. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.